give proper reasons for the multiple choice questions:
1) Which of the following modifications is most important to convert a single-core processor design to a multi-core design?
(a) Wider pipeline
(b) Private caches
(c) Highly accurate branch prediction
(d) High-speed ALUs
2) Consider a multiprocessor system that implements the weak consistency model using a write-back write-update cache coherence protocol. What is the maximum number of locations in the system that can simultaneously hold distinct values for a memory location immediately after a write operation is issued from a core?
(d) Number of cache memories
3) You are hired by a processor-manufacturing company to look into the possibility of introducing dynamic scheduling into their processor lines to improve performance. For backward compatibility reasons the company does not want any changes to the ISA (instruction set architecture). You notice the following 4 aspects about the current situation. Which one of these 4 aspects would be a strong motivator for you to advocate for introducing dynamic scheduling?
(a) the power consumption is currently high
(b) the company has developed a high-quality optimizing compiler
(c) the ISA has very few registers
(d) the ISA specifies the sequential consistency model
4) You have incorporated trace scheduling into a compiler framework for use in a statically scheduled superscalar processor. When you ran the trace scheduled code you noticed an increase in execution time. Which one of the following is the most compelling reason for the drop in performance?
(a) The traces were too long
(b) The programs have too many data dependencies
(c) The programs have too many memory references
(d) The programs have too many branches that are difficult to predict
Requirements: as long as it needs to be | .doc file
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